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Commits on Sep 2, 2020

• Created generic and Altera block RAM/ROM for registers and microcode

  fredrequin

  committed
  26c90eb

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Commits on Aug 31, 2020

• 68k registers uses now two M4k memory blocks : new core size is 3200 LEs !!

  fredrequin

  committed
  1bf00e9

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• Lot of signals renaming and 68k registers read/write improvement

  fredrequin

  committed
  c5d838c

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Commits on Aug 30, 2020

• Fixed dumb error in Adder logic

  fredrequin

  committed
  babe290

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Commits on Aug 29, 2020

• Added a separate latch for BCD operation

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  fredrequin

  committed
  3207301

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• Added IR pre-decoding to improve timings

  fredrequin

  committed
  07584a4

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• Added E clock falling / rising edge signals

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  fredrequin

  committed
  03fd7f7

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• Use one-hot encoding instead of enum on tState signal

  fredrequin

  committed
  dde3889

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Commits on Aug 28, 2020

• ALU optimization by re-writing the adder

  fredrequin

  committed
  f2be6ec

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• Stupid typo fix for TAS instruction

  fredrequin

  committed
  b32f1c5

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• ALU optimization by re-ordering ALU opcodes

  fredrequin

  committed
  d04a8b3

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• Increase address bus width to 32 bits

  fredrequin

  committed
  b2ee11c

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• Fixed UNOPTFLAT verilator warning on Nanod structure

  fredrequin

  committed
  83d7dfe

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• Fixed UNOPTFLAT verilator warning on Irdecod structure

  fredrequin

  committed
  ddf753f

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• Use a separate clock signal for verilator

  fredrequin

  committed
  5c87f89

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• Fixed some verilator warnings

  fredrequin

  committed
  6709833

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Commits on Nov 26, 2019

• Support HALT single step

  

  ijor

  committed
  026efe4

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Commits on Nov 10, 2019

• Fix some tools might infer wrong flag on div overflow

  

  ijor

  committed
  c309271

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Commits on Oct 7, 2019

• Some PC relative instructions had wrong FC encoding

  

  ijor

  committed
  884548a

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Commits on Feb 27, 2019

• Fixed bug in ROXR instruction

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  ijor

  committed
  a5a8dae

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Commits on Feb 16, 2019

• Update fx68kAlu.sv

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  ijor

  committed
  c2ed31f

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Commits on Nov 15, 2018

• Create README.md

  ijor

  authored
  d6e4ccc

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• Add files via upload

  ijor

  authored
  588b297

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• Initial commit

  ijor

  authored
  968140f

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