Add support for Relaxed SIMD proposal instructions (bytecodealliance#359)

Author: yurydelendik

crates/wasm-encoder/src/code.rs

@@ -664,6 +664,23 @@ pub enum Instruction<'a> {
     F64x2ConvertLowI32x4U,
     F32x4DemoteF64x2Zero,
     F64x2PromoteLowF32x4,
+    I8x16SwizzleRelaxed,
+    I32x4TruncSatF32x4SRelaxed,
+    I32x4TruncSatF32x4URelaxed,
+    I32x4TruncSatF64x2SZeroRelaxed,
+    I32x4TruncSatF64x2UZeroRelaxed,
+    F32x4FmaRelaxed,
+    F32x4FmsRelaxed,
+    F64x2FmaRelaxed,
+    F64x2FmsRelaxed,
+    I8x16LaneSelect,
+    I16x8LaneSelect,
+    I32x4LaneSelect,
+    I64x2LaneSelect,
+    F32x4MinRelaxed,
+    F32x4MaxRelaxed,
+    F64x2MinRelaxed,
+    F64x2MaxRelaxed,
 }
 
 impl Instruction<'_> {
@@ -2140,6 +2157,74 @@ impl Instruction<'_> {
                 bytes.push(0xFD);
                 bytes.extend(encoders::u32(0xDB));
             }
+            Instruction::I8x16SwizzleRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xA2));
+            }
+            Instruction::I32x4TruncSatF32x4SRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xA5));
+            }
+            Instruction::I32x4TruncSatF32x4URelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xA6));
+            }
+            Instruction::I32x4TruncSatF64x2SZeroRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xC5));
+            }
+            Instruction::I32x4TruncSatF64x2UZeroRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xC6));
+            }
+            Instruction::F32x4FmaRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xAF));
+            }
+            Instruction::F32x4FmsRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xB0));
+            }
+            Instruction::F64x2FmaRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xCF));
+            }
+            Instruction::F64x2FmsRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xD0));
+            }
+            Instruction::I8x16LaneSelect => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xB2));
+            }
+            Instruction::I16x8LaneSelect => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xB3));
+            }
+            Instruction::I32x4LaneSelect => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xD2));
+            }
+            Instruction::I64x2LaneSelect => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xD3));
+            }
+            Instruction::F32x4MinRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xB4));
+            }
+            Instruction::F32x4MaxRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xE2));
+            }
+            Instruction::F64x2MinRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xD4));
+            }
+            Instruction::F64x2MaxRelaxed => {
+                bytes.push(0xFD);
+                bytes.extend(encoders::u32(0xEE));
+            }
         }
     }
 }

crates/wasm-smith/src/code_builder.rs

@@ -324,15 +324,19 @@ instructions! {
     (Some(simd_v128_f32_on_stack), f32x4_replace_lane),
     (Some(simd_v128_on_stack), f64x2_extract_lane),
     (Some(simd_v128_f64_on_stack), f64x2_replace_lane),
-    (Some(simd_v128_v128_on_stack), i8x16_swizzle),
     (Some(simd_i32_on_stack), i8x16_splat),
     (Some(simd_i32_on_stack), i16x8_splat),
     (Some(simd_i32_on_stack), i32x4_splat),
     (Some(simd_i64_on_stack), i64x2_splat),
     (Some(simd_f32_on_stack), f32x4_splat),
     (Some(simd_f64_on_stack), f64x2_splat),
     (Some(simd_v128_v128_on_stack), i8x16_swizzle),
+    (Some(simd_v128_v128_on_stack_relaxed), i8x16_swizzle_relaxed),
     (Some(simd_v128_v128_v128_on_stack), v128_bitselect),
+    (Some(simd_v128_v128_v128_on_stack_relaxed), i8x16_laneselect),
+    (Some(simd_v128_v128_v128_on_stack_relaxed), i16x8_laneselect),
+    (Some(simd_v128_v128_v128_on_stack_relaxed), i32x4_laneselect),
+    (Some(simd_v128_v128_v128_on_stack_relaxed), i64x2_laneselect),
     (Some(simd_v128_v128_on_stack), i8x16_eq),
     (Some(simd_v128_v128_on_stack), i8x16_ne),
     (Some(simd_v128_v128_on_stack), i8x16_lt_s),
@@ -523,6 +527,18 @@ instructions! {
     (Some(simd_v128_on_stack), f64x2_convert_low_i32x4u),
     (Some(simd_v128_on_stack), f32x4_demote_f64x2_zero),
     (Some(simd_v128_on_stack), f64x2_promote_low_f32x4),
+    (Some(simd_v128_on_stack_relaxed), i32x4_trunc_sat_f32x4s_relaxed),
+    (Some(simd_v128_on_stack_relaxed), i32x4_trunc_sat_f32x4u_relaxed),
+    (Some(simd_v128_on_stack_relaxed), i32x4_trunc_sat_f64x2s_zero_relaxed),
+    (Some(simd_v128_on_stack_relaxed), i32x4_trunc_sat_f64x2u_zero_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f32x4_fma_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f32x4_fms_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f64x2_fma_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f64x2_fms_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f32x4_min_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f32x4_max_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f64x2_min_relaxed),
+    (Some(simd_v128_v128_on_stack_relaxed), f64x2_max_relaxed),
 }
 
 pub(crate) struct CodeBuilderAllocations {
@@ -3420,17 +3436,33 @@ fn simd_v128_on_stack(module: &Module, builder: &mut CodeBuilder) -> bool {
     module.config.simd_enabled() && builder.types_on_stack(&[ValType::V128])
 }
 
+#[inline]
+fn simd_v128_on_stack_relaxed(module: &Module, builder: &mut CodeBuilder) -> bool {
+    module.config.relaxed_simd_enabled() && builder.types_on_stack(&[ValType::V128])
+}
+
 #[inline]
 fn simd_v128_v128_on_stack(module: &Module, builder: &mut CodeBuilder) -> bool {
     module.config.simd_enabled() && builder.types_on_stack(&[ValType::V128, ValType::V128])
 }
 
+#[inline]
+fn simd_v128_v128_on_stack_relaxed(module: &Module, builder: &mut CodeBuilder) -> bool {
+    module.config.relaxed_simd_enabled() && builder.types_on_stack(&[ValType::V128, ValType::V128])
+}
+
 #[inline]
 fn simd_v128_v128_v128_on_stack(module: &Module, builder: &mut CodeBuilder) -> bool {
     module.config.simd_enabled()
         && builder.types_on_stack(&[ValType::V128, ValType::V128, ValType::V128])
 }
 
+#[inline]
+fn simd_v128_v128_v128_on_stack_relaxed(module: &Module, builder: &mut CodeBuilder) -> bool {
+    module.config.relaxed_simd_enabled()
+        && builder.types_on_stack(&[ValType::V128, ValType::V128, ValType::V128])
+}
+
 #[inline]
 fn simd_v128_i32_on_stack(module: &Module, builder: &mut CodeBuilder) -> bool {
     module.config.simd_enabled() && builder.types_on_stack(&[ValType::V128, ValType::I32])
@@ -3657,6 +3689,20 @@ macro_rules! simd_unop {
     };
 }
 
+macro_rules! simd_ternop {
+    ($instruction:ident, $generator_fn_name:ident) => {
+        fn $generator_fn_name(
+            _: &mut Unstructured,
+            _: &Module,
+            builder: &mut CodeBuilder,
+        ) -> Result<Instruction> {
+            builder.pop_operands(&[ValType::V128, ValType::V128, ValType::V128]);
+            builder.push_operands(&[ValType::V128]);
+            Ok(Instruction::$instruction)
+        }
+    };
+}
+
 macro_rules! simd_shift {
     ($instruction:ident, $generator_fn_name:ident) => {
         fn $generator_fn_name(
@@ -3868,13 +3914,27 @@ simd_unop!(F64x2ConvertLowI32x4S, f64x2_convert_low_i32x4s);
 simd_unop!(F64x2ConvertLowI32x4U, f64x2_convert_low_i32x4u);
 simd_unop!(F32x4DemoteF64x2Zero, f32x4_demote_f64x2_zero);
 simd_unop!(F64x2PromoteLowF32x4, f64x2_promote_low_f32x4);
-
-fn v128_bitselect(
-    _: &mut Unstructured,
-    _: &Module,
-    builder: &mut CodeBuilder,
-) -> Result<Instruction> {
-    builder.pop_operands(&[ValType::V128, ValType::V128, ValType::V128]);
-    builder.push_operands(&[ValType::V128]);
-    Ok(Instruction::V128Bitselect)
-}
+simd_ternop!(V128Bitselect, v128_bitselect);
+simd_binop!(I8x16SwizzleRelaxed, i8x16_swizzle_relaxed);
+simd_unop!(I32x4TruncSatF32x4SRelaxed, i32x4_trunc_sat_f32x4s_relaxed);
+simd_unop!(I32x4TruncSatF32x4URelaxed, i32x4_trunc_sat_f32x4u_relaxed);
+simd_unop!(
+    I32x4TruncSatF64x2SZeroRelaxed,
+    i32x4_trunc_sat_f64x2s_zero_relaxed
+);
+simd_unop!(
+    I32x4TruncSatF64x2UZeroRelaxed,
+    i32x4_trunc_sat_f64x2u_zero_relaxed
+);
+simd_binop!(F32x4FmaRelaxed, f32x4_fma_relaxed);
+simd_binop!(F32x4FmsRelaxed, f32x4_fms_relaxed);
+simd_binop!(F64x2FmaRelaxed, f64x2_fma_relaxed);
+simd_binop!(F64x2FmsRelaxed, f64x2_fms_relaxed);
+simd_ternop!(I8x16LaneSelect, i8x16_laneselect);
+simd_ternop!(I16x8LaneSelect, i16x8_laneselect);
+simd_ternop!(I32x4LaneSelect, i32x4_laneselect);
+simd_ternop!(I64x2LaneSelect, i64x2_laneselect);
+simd_binop!(F32x4MinRelaxed, f32x4_min_relaxed);
+simd_binop!(F32x4MaxRelaxed, f32x4_max_relaxed);
+simd_binop!(F64x2MinRelaxed, f64x2_min_relaxed);
+simd_binop!(F64x2MaxRelaxed, f64x2_max_relaxed);

crates/wasm-smith/src/config.rs

@@ -253,6 +253,12 @@ pub trait Config: 'static + std::fmt::Debug {
         false
     }
 
+    /// Determines whether the Relaxed SIMD proposal is enabled for
+    /// generating insructions. Defaults to `false`.
+    fn relaxed_simd_enabled(&self) -> bool {
+        false
+    }
+
     /// Determines whether the exception-handling proposal is enabled for
     /// generating insructions. Defaults to `false`.
     fn exceptions_enabled(&self) -> bool {
@@ -376,6 +382,7 @@ pub struct SwarmConfig {
     pub memory_offset_choices: (u32, u32, u32),
     pub memory_max_size_required: bool,
     pub simd_enabled: bool,
+    pub relaxed_simd_enabled: bool,
     pub exceptions_enabled: bool,
     pub allow_start_export: bool,
     pub max_type_size: u32,
@@ -429,6 +436,7 @@ impl<'a> Arbitrary<'a> for SwarmConfig {
             memory_offset_choices: (75, 24, 1),
             allow_start_export: true,
             simd_enabled: false,
+            relaxed_simd_enabled: false,
             exceptions_enabled: false,
             memory64_enabled: false,
             max_type_size: 1000,
@@ -567,6 +575,10 @@ impl Config for SwarmConfig {
         self.simd_enabled
     }
 
+    fn relaxed_simd_enabled(&self) -> bool {
+        self.relaxed_simd_enabled
+    }
+
     fn exceptions_enabled(&self) -> bool {
         self.exceptions_enabled
     }

crates/wasm-smith/src/encode.rs

@@ -903,5 +903,22 @@ fn translate_instruction(inst: &Instruction) -> wasm_encoder::Instruction {
         F64x2ConvertLowI32x4U => wasm_encoder::Instruction::F64x2ConvertLowI32x4U,
         F32x4DemoteF64x2Zero => wasm_encoder::Instruction::F32x4DemoteF64x2Zero,
         F64x2PromoteLowF32x4 => wasm_encoder::Instruction::F64x2PromoteLowF32x4,
+        I8x16SwizzleRelaxed => wasm_encoder::Instruction::I8x16SwizzleRelaxed,
+        I32x4TruncSatF32x4SRelaxed => wasm_encoder::Instruction::I32x4TruncSatF32x4SRelaxed,
+        I32x4TruncSatF32x4URelaxed => wasm_encoder::Instruction::I32x4TruncSatF32x4URelaxed,
+        I32x4TruncSatF64x2SZeroRelaxed => wasm_encoder::Instruction::I32x4TruncSatF64x2SZeroRelaxed,
+        I32x4TruncSatF64x2UZeroRelaxed => wasm_encoder::Instruction::I32x4TruncSatF64x2UZeroRelaxed,
+        F32x4FmaRelaxed => wasm_encoder::Instruction::F32x4FmaRelaxed,
+        F32x4FmsRelaxed => wasm_encoder::Instruction::F32x4FmsRelaxed,
+        F64x2FmaRelaxed => wasm_encoder::Instruction::F64x2FmaRelaxed,
+        F64x2FmsRelaxed => wasm_encoder::Instruction::F64x2FmsRelaxed,
+        I8x16LaneSelect => wasm_encoder::Instruction::I8x16LaneSelect,
+        I16x8LaneSelect => wasm_encoder::Instruction::I16x8LaneSelect,
+        I32x4LaneSelect => wasm_encoder::Instruction::I32x4LaneSelect,
+        I64x2LaneSelect => wasm_encoder::Instruction::I64x2LaneSelect,
+        F32x4MinRelaxed => wasm_encoder::Instruction::F32x4MinRelaxed,
+        F32x4MaxRelaxed => wasm_encoder::Instruction::F32x4MaxRelaxed,
+        F64x2MinRelaxed => wasm_encoder::Instruction::F64x2MinRelaxed,
+        F64x2MaxRelaxed => wasm_encoder::Instruction::F64x2MaxRelaxed,
     }
 }

crates/wasm-smith/src/lib.rs

@@ -965,6 +965,23 @@ enum Instruction {
     F64x2ConvertLowI32x4U,
     F32x4DemoteF64x2Zero,
     F64x2PromoteLowF32x4,
+    I8x16SwizzleRelaxed,
+    I32x4TruncSatF32x4SRelaxed,
+    I32x4TruncSatF32x4URelaxed,
+    I32x4TruncSatF64x2SZeroRelaxed,
+    I32x4TruncSatF64x2UZeroRelaxed,
+    F32x4FmaRelaxed,
+    F32x4FmsRelaxed,
+    F64x2FmaRelaxed,
+    F64x2FmsRelaxed,
+    I8x16LaneSelect,
+    I16x8LaneSelect,
+    I32x4LaneSelect,
+    I64x2LaneSelect,
+    F32x4MinRelaxed,
+    F32x4MaxRelaxed,
+    F64x2MinRelaxed,
+    F64x2MaxRelaxed,
 }
 
 #[derive(Debug)]
@@ -988,7 +1005,7 @@ impl Module {
         self.valtypes.push(ValType::I64);
         self.valtypes.push(ValType::F32);
         self.valtypes.push(ValType::F64);
-        if self.config.simd_enabled() {
+        if self.config.simd_enabled() || self.config.relaxed_simd_enabled() {
             self.valtypes.push(ValType::V128);
         }
         if self.config.reference_types_enabled() {

crates/wasm-smith/tests/tests.rs

@@ -10,6 +10,7 @@ fn wasm_features() -> WasmFeatures {
         bulk_memory: true,
         reference_types: true,
         simd: true,
+        relaxed_simd: true,
         memory64: true,
         exceptions: true,
         ..WasmFeatures::default()

crates/wasmparser/benches/benchmark.rs

@@ -210,6 +210,7 @@ fn validate_benchmark(c: &mut Criterion) {
             reference_types: true,
             multi_value: true,
             simd: true,
+            relaxed_simd: true,
             exceptions: true,
             module_linking: true,
             bulk_memory: true,